Design and Analysis of a Common Emitter PNP Amplifier

1. Problem Statement

We will design a Common Emitter PNP amplifier with the following specifications:

• Voltage gain ( A_V = -10 )
• Power supply ( V_{CC} = 12V )
• Collector current ( I_C = 2mA )
• Input impedance ( Z_{in} > 10kΩ )
• Load resistor ( R_L = 2kΩ )

2. Step-by-Step Design Process

Step 1: Choose Emitter Resistance ( R_E )

Using the small-signal model approximation:

$$ r_e = \frac{25mV}{I_E} $$

Since ( I_E \approx I_C = 2mA ):

$$ r_e = \frac{25mV}{2mA} = 12.5Ω $$

To improve stability, we choose ( R_E ) 10× larger:

$$ R_E = 10 \times r_e = 125Ω $$

Using the nearest standard value:
( R_E = 130Ω )

Step 2: Choose Collector Resistance ( R_C )

Voltage gain is:

$$ A_V = -\frac{R_C}{r_e + R_E} $$

Rearranging for ( R_C ):

$$ R_C = A_V \times (r_e + R_E) $$

$$ R_C = 10 \times (12.5Ω + 130Ω) = 1.42kΩ $$

Using the nearest standard value:
( R_C = 1.5kΩ )

Step 3: Set Base Voltage ( V_B )

For proper operation:

$$ V_B = V_E + V_{BE} $$

For a PNP transistor, ( V_{BE} = -0.7V ), and:

$$ V_E = -I_E R_E = - (2mA \times 130Ω) = -0.26V $$

Thus:

$$ V_B = -0.26V - 0.7V = -0.96V $$

Step 4: Choose Base Resistors ( R_1 ) and ( R_2 )

Using a voltage divider:

$$ V_B = V_{CC} \times \frac{R_2}{R_1 + R_2} $$

Rearrange for ( R_2 ):

$$ R_2 = \frac{V_B}{V_{CC}} \times (R_1 + R_2) $$

Choosing ( R_1 = 100kΩ ):

$$ R_2 = \frac{-0.96V}{12V} \times (100kΩ + R_2) $$

Approximating ( R_2 \approx 10kΩ ), we use:
( R_2 = 10kΩ )

3. AC Coupling and Bypass Capacitor Design

Input Coupling Capacitor ( C_{in} )

$$ C_{in} = \frac{1}{2\pi f_c Z_{in}} $$

For ( f_c = 100Hz ) and ( Z_{in} \approx 10kΩ ):

$$ C_{in} = \frac{1}{2\pi (100)(10kΩ)} \approx 0.16\mu F $$

Using the standard value:
( C_{in} = 0.22\mu F )

Output Coupling Capacitor ( C_{out} )

$$ C_{out} = \frac{1}{2\pi f_c R_L} $$

For ( R_L = 2kΩ ):

$$ C_{out} = \frac{1}{2\pi (100)(2kΩ)} \approx 0.8\mu F $$

Using the standard value:
( C_{out} = 1\mu F )

Bypass Capacitor ( C_E )

For maximum gain:

$$ C_E = \frac{1}{2\pi f_c R_E} $$

$$ C_E = \frac{1}{2\pi (100)(130Ω)} \approx 12.3\mu F $$

Using the standard value:
( C_E = 10\mu F )

4. Verify Design Performance

Voltage Gain ( A_V ):

$$ A_V = -\frac{R_C}{r_e + R_E} = -\frac{1.5kΩ}{12.5Ω + 130Ω} = -10.6 $$

Close to target ( -10 ).

Input Impedance ( Z_{in} ):

$$ Z_{in} = (\beta + 1)(r_e + R_E) $$

Assuming ( \beta = 100 ):

$$ Z_{in} = (100 + 1) \times (12.5Ω + 130Ω) = 14.3kΩ $$

Meets requirement ( >10kΩ ).

Output Impedance ( Z_{out} ):

$$ Z_{out} \approx R_C = 1.5kΩ $$

5. Final Component Values

6. Conclusion

1. Determine amplifier requirements (gain, impedance, power supply).
2. Set transistor biasing to ensure active region operation.
3. Calculate resistors for gain and stability.
4. Choose capacitors for AC coupling and frequency response.
5. Verify performance through calculations.

Next Steps

• Simulate this circuit using SPICE/Multisim.
• Modify for different gain values.
• Compare with a Common Base or Common Collector design.

Want More?

Would you like:

• More worked examples?
• A guide for designing a Common Base or Common Collector amplifier?
• A practical SPICE simulation tutorial?

Let me know how you'd like to proceed! 😊